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hcpl06xx ?high speed-10 mbit/s logic gate optocouplers ?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 april 2009 HCPL0600, hcpl0601, hcpl0611, hcpl0637, hcpl0638, hcpl0639 high speed-10 mbit/s logic gate optocouplers single channel: HCPL0600, hcpl0601, hcpl0611 dual channel: hcpl0637, hcpl0638, hcpl0639 features compact so8 package ve ry high speed-10 mbit/s superior cmr logic gate output strobable output (single channel devices) wired or-open collector u .l. recognized (file # e90700) iec60747-5-2 approved (vde option) ?HCPL0600, hcpl0601, hcpl0611 only applications ground loop elimination lsttl to ttl, lsttl or 5-volt cmos line receiver, data transmission data multiplexing switching power supplies pulse transformer replacement computer-peripheral interface description the hcpl06xx optocouplers consist of an algaas led, optically coupled to a very high speed integrated photo-detector logic gate with a strobable output (single channel devices). the devices are housed in a compact small-outline package. this output features an open col- lector, thereby permitting wired or outputs. the HCPL0600, hcpl0601 and hcpl0611 output consists of bipolar transistors on a bipolar process while the hcpl0637, hcpl0638, and hcpl0639 output consists of bipolar transistors on a cmos process for reduced power consumption. the coupled parameters are guar- anteed over the temperature range of -40? to +85?. an internal noise shield provides superior common mode rejection. pa ck ag e dimensions lead coplanarity : 0.004 (0.10) max 0.202 (5.13) pin 1 0.019 (0.48) 0.182 (4.63) 0.021 (0.53) 0.011 (0.28) 0.050 (1.27) typ 0.244 (6.19) 0.224 (5.69) 0.143 (3.63) 0.123 (3.13) 0.008 (0.20) 0.003 (0.08) 0.010 (0.25) 0.006 (0.16) sea ti ng plane 0.164 (4.16) 0.144 (3.66) note: all dimensions are in inches (millimeters)
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 2 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers t ruth table (positive logic) *dual channel devices or single channel devices with pin 7 not connected. a 0.1? bypass capacitor must be connected between pins 8 and 5. (see note 1) input enable output hhl lhh hlh llh h* nc* l* l* nc* h* single-channel circuit drawing (HCPL0600, hcpl0601 and hcpl0611) dual-channel circuit drawing (hcpl0637, hcpl0638 and hcpl0639) 1 2 3 4 5 6 7 8 n/c _ v cc v e v o gnd + n/c v f 1 2 3 4 5 6 7 8 + _ v f1 v cc v 01 v 02 gnd v f2 _ +
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 3 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers absolute maximum ratings (no derating required up to 85?) stresses exceeding the absolute maximum ratings may damage the device. the device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. recommended operating conditions the recommended operating conditions table defines the conditions for actual device operation. recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. *6.3ma is a guard banded value which allows for at least 20% ctr degradation. initial input current threshold value is 5.0ma or less symbol parameter value units t stg storage temperature -40 to +125 ? t opr operating temperature -40 to +85 ? emitter i f dc/average forward input current (each channel) single channel 50 ma dual channel v e enable input voltage not to exceed vcc by more than 500mv single channel 5.5 v v r reverse input voltage (each channel) 5.0 v p i po w er dissipation single channel 45 mw dual channel detector v cc (1 minute max) supply voltage 7.0 v i o output current (each channel) single channel 50 ma dual channel 15 v o output voltage (each channel) 7.0 v p o collector output power dissipation single channel 85 mw dual channel 85 symbol parameter min. max. units i fl input current, low level 0 250 ? i fh input current, high level *6.3 15 ma v cc supply voltage, output 4.5 5.5 v v el enable voltage, low level single channel only 0 0.8 v v eh enable voltage, high level single channel only 2.0 v cc v t a operating temperature -40 +85 ? nf an out (ttl load) single channel 8 ttl loads dual channel 5 r l output pull-up 330 4k ?
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 4 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers electrical characteristics (t a = -40? to +85? unless otherwise speci?d.) individual component characteristics switching characteristics (t a = -40? to +85?, v cc = 5 v, i f = 7.5 ma unless otherwise speci?d.) symbol parameter test conditions min. typ.* max. unit emitter v f input forward voltage i f = 10ma 1.8 v t a = 25? 1.75 b vr input reverse breakdown voltage i r = 10? 5.0 v ? vf/ ? ta input diode temperature coef?ient i f = 10ma -1.5 mv/? detector i cch high level supply current i f = 0ma, v e = 0.5 v v cc = 5.5v single channel 10 ma dual channel 15 i ccl low level supply current i f = 10ma, v e = 0.5 v v cc = 5.5v single channel 13 ma dual channel 21 i el low level enable current v cc = 5.5v, v e = 0.5v single channel -1.6 ma i eh high level enable current v cc = 5.5v, v e = 2.0v single channel -1.6 ma v eh high level enable voltage v cc = 5.5v, i f = 10ma single channel 2.0 v v el low level enable voltage v cc = 5.5v, i f = 10ma (2) single channel 0.8 v symbol ac characteristics test conditions device min. typ. max. unit t plh propagation delay time to output high level r l = 350 ? , c l = 15pf (3) t a = 25? all 20 75 ns (fig. 20) 100 t phl propagation delay time to output low level r l = 350 ? , c l = 15pf (4) t a = 25? all 25 75 ns (fig. 20) 100 |t phl -t plh | pulse width distortion r l = 350 ? , c l = 15pf (fig. 20) all 35 ns t r output rise time (10-90%) r l = 350 ? , c l = 15pf (5) (fig. 20) single ch 50 ns dual ch 17 t f output fall time (90-10%) r l = 350 ? , c l = 15pf (6) (fig. 20) single ch 12 ns dual ch 5 t elh enable propagation delay time to output high level i f = 7.5ma, v eh = 3.5v, r l = 350 ? , c l = 15pf (7) (fig. 21) HCPL0600 hcpl0601 hcpl0611 20 ns t ehl enable propagation delay time to output low level i f = 7.5ma, v eh = 3.5v, r l = 350 ? , c l = 15 pf (8) (fig. 21) HCPL0600 hcpl0601 hcpl0611 20 ns |cm h | common mode tr ansient immunity (at output high level) r l = 350 ? , t a =25?, i f = 0ma, v oh (min.) = 2.0 v (9) (fig. 22, 23) |v cm | = 10v HCPL0600 hcpl0637 v/? |v cm | = 50v hcpl0601 hcpl0638 5000 |v cm | = 1,000v hcpl0611 10,000 hcpl0639 25,000 |cm h | common mode tr ansient immunity (at output low level) r l = 350 ? , t a =25?, i f = 7.5ma, v ol (max.) = 0.8 v (10) (fig. 22, 23) |v cm | = 10v HCPL0600 hcpl0637 v/? |v cm | = 50v hcpl0601 hcpl0638 5000 |v cm | = 1,000v hcpl0611 10,000 hcpl0639 25,000
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 5 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers t ransfer characteristics (t a = -40? to +85? unless otherwise speci?d.) isolation characteristics (t a = -40? to +85? unless otherwise speci?d.) *all typical values are at v cc = 5 v, t a = 25? notes: 1. the v cc supply to each optoisolator must be bypassed by a 0.1? capacitor or larger. this can be either a ceramic or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible to the package v cc and gnd pins of each device. 2. enable input ?no pull up resistor required as the device has an internal pull up resistor. 3. t plh ?propagation delay is measured from the 3.75ma level on the high to low transition of the input current pulse to the 1.5v level on the low to high transition of the output voltage pulse. 4. t phl ?propagation delay is measured from the 3.75ma level on the low to high transition of the input current pulse to the 1.5v level on the high to low transition of the output voltage pulse. 5. t r ?rise time is measured from the 90% to the 10% levels on the low to high transition of the output pulse. 6. t f ?fall time is measured from the 10% to the 90% levels on the high to low transition of the output pulse. 7. t elh ?enable input propagation delay is measured from the 1.5v level on the high to low transition of the input voltage pulse to the 1.5v level on the low to high transition of the output voltage pulse. 8. t ehl ?enable input propagation delay is measured from the 1.5v level on the low to high transition of the input voltage pulse to the 1.5v level on the high to low transition of the output voltage pulse. 9. cm h ?the maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the high state (i.e., v out > 2.0v). measured in volts per microsecond (v/?). 10. cm l ?the maximum tolerable rate of fall of the common mode voltage to ensure the output will remain in the low output state (i.e., v out < 0.8v). measured in volts per microsecond (v/?). 11. device considered a two-terminal device: pins 1, 2, 3 and 4 shorted together, and pins 5, 6, 7 and 8 shorted together. symbol dc characteristics test conditions min. typ.* max. unit i oh high level output current v cc = 5.5v, v o = 5.5 v, i f = 250?, v e = 2.0v (2) 100 ? v ol low level output voltage v cc = 5.5v, i f = 5ma, v e = 2.0v, i ol = 13ma (2) 0.6 v i ft input threshold current v cc = 5.5v, v o = 0.6v, v e = 2.0v, i ol = 13ma 5ma symbol characteristics test conditions min. typ.* max. unit i i-o input-output insulation leakage current relative humidity = 45%, t a = 25?, t = 5s, v i-o = 3000 vdc (11) 1.0* ? v iso withstand insulation test voltage r h < 50%, t a = 25?, i i-o 2?, t = 1 min. (11) 3750 v rms r i-o resistance (input to output) v i-o = 500v (11) 10 12 ? c i-o capacitance (input to output) f = 1mhz (11) 0.6 pf
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 6 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers t ypical performance curves (HCPL0600, hcpl0601 and hcpl0611 only) fig. 1 forward current vs. input forward voltage v f ?forward voltage (v) i f ?forward current (ma) fig. 2 output voltage vs. forward current i oh ?high leve l output current ( a) i th ?input threshold current (ma) fig. 3 input threshold current vs. temperature t a ?temperature (?c) t a ?temperature (?c) fig. 4 high level output current vs. temperature i f ? forward input current (ma) v o ?output voltage (v) 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 0.001 0.01 0.1 1 10 100 t a = 85 c t a = 70 c t a = 25 c t a = 0 c t a = -40 c 012345 0 1 2 3 4 5 6 t a = 25 c v cc = 5v r l = 350 ? r l = 1k ? -40 -20 0 20 4 06080100 0 1 2 3 4 5 v cc = 5v v o = 0.6v r l = 350 ? r l = 1k ? -40 -20 0 20 4 06080100 0 2 4 6 8 10 12 14 16 v o = v cc = 5.5v v e = 2v i f = 250 a
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 7 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers t ypical performance curves (HCPL0600, hcpl0601 and hcpl0611 only) fig. 5 low level output voltage vs. temperature t a ?temperature (?c) t a ?temperature (?c) t a ?temperature (?c) v ol ?low level output voltage (v) t p ?propagation delay (ns) fig. 6 low level output current vs. temperature i ol ?low level outpu t current (ma) t p ?propagation delay (ns) fig. 7 propagation delay vs. temperature fig. 8 propagation delay vs. pulse input current i f ?pulse input current (ma) -40 -20 0 20 4 06080100 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 v cc = 5.5v v e = 2v i f = 5ma i o = 12.8ma i o = 9.6ma i o = 6.4ma i o = 16ma -40 -20 0 20 4 06080100 20 25 30 35 40 45 50 55 60 v cc = 5v v e = 2v v ol = 0.6v i f = 10-15ma i f = 5ma -40 -20 0 20 4 06080100 20 30 40 50 60 70 80 90 100 v cc = 5v i f = 7.5ma t plh r l = 1k ? t plh r l = 350 ? t phl rl = 350 ? & 1k ? 57911 13 15 20 30 40 50 60 70 80 90 v cc = 5v t a = 25 c t plh r l = 1k ? t plh r l = 350 ? t phl rl = 350 ? & 1k ?
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 8 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers t ypical performance curves (HCPL0600, hcpl0601 and hcpl0611 only) fig. 9 typical enable propagation delay vs. temparature t a ?temperature (?c) t a ?temperature (?c) t a ?temperature (?c) t e ?enable pr opagation delay (ns ) fig. 10 typical rise and fall time vs. temperature t f ? f all time (ns) fig. 11 typical pulse width distortion vs. temperature pwd ?pulse width distor tion (ns) -40 -20 0 20 4 06080100 0 10 20 30 40 50 60 70 80 90 v cc = 5v v eh = 3v v el = 0v i f = 7.5ma t elh r l = 1k ? t elh r l = 350 ? t ehl rl = 350 ? & 1k ? -40 -20 0 20 4 06080100 0 40 80 120 160 200 240 v cc = 5v i f = 7.5ma t r r l = 1k ? t r r l = 350 ? t f r l = 350 ? & 1k ? -40 -20 0 20 4 06080100 0 5 10 15 20 25 30 35 40 v cc = 5v i f = 7.5ma r l = 1k ? r l = 350 ?
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 9 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers t ypical performance curves (hcpl0637, hcpl0638 and hcpl0639 only) fig. 12 input forward current vs. forward voltage fig. 13 input threshold current vs. ambient temperature fig. 14 high level output current vs. ambient temperature fig. 15 low level output current vs. ambient temperature fig. 16 low level output voltage vs. ambient temperature v f ?forward voltage (v) 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 1.7 i f ?forward current (ma) t a = 85 c t a = 100 c t a = 25 c t a = 0 c t a = -40 c 0.8 0.001 0.01 0.1 1 10 100 i th ?input threshold current (ma) t a ?ambient temperature ( c) t a ?ambient temperature ( c) t a ?ambient temperature ( c) t a ?ambient temperature ( c) -40 -20 0 20 40 60 80 100 0.0 0.5 1.0 1.5 2.0 2.5 v cc = 5.5v v o = 0.6v r l = 1k ? r l = 350 ? r l = 4k ? -40 -20 0 20 40 60 80 100 i oh ? high level output current (na) 0 4 8 12 16 20 v o = v cc = 5.5v v e = 2v (single channel only) i f = 250 a -40 -20 0 20 40 60 80 100 i ol ?low level output current (ma) 10 15 20 25 30 35 40 v cc = 5.5v v e = 2v (single channel only) v ol = 0.6v i f = 5 ?15ma -40 -20 0 20 40 60 80 100 v ol ?low level output voltage (v) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 v cc = 5.5v v e = 2v (single channel only) i f = 5ma i o = 6.4ma i o = 9.6ma i o = 12.8ma i o = 16ma fig. 17 pulse width distortion vs. ambient temperature -40 -20 0 20 40 60 80 100 pwd ?pulse width distortion (ns) 0 10 20 30 40 50 60 70 v cc = 5v i f = 7.5ma rl = 1k ? rl = 350 ? rl = 4k ? t a ?ambient temperature ( c)
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 10 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers t ypical performance curves (hcpl0637, hcpl0638 and hcpl0639 only) fig. 18 propagation delay vs. ambient temperature fig. 19 rise and fall times vs. ambient temperature t a ?ambient temperature ( c) t a ?ambient temperature ( c) -40 -20 0 20 40 60 80 100 0 20 40 60 80 100 120 v cc = 5v i f = 7.5ma t phl rl = 350 ? , 1k ? , 4k ? t plh rl = 350 ? t plh rl = 1k ? t plh rl = 4k ? t p ?propagation delay (ns) -40 -20 0 20 40 60 80 100 t r ?rise time (ns) 0 50 100 150 200 250 300 350 t f ?fall time (ns) 0 1 2 3 4 5 6 7 v cc = 5v i f = 7.5ma t f ?rl = 350 ? , 1k ? , 4k ? t r ?rl = 350 ? t r ?rl = 1k ? t r ?rl = 4k ?
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 11 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers phl t f i = 7.5 ma 1.5 v 90% 10% 7.5 ma +5v 1.5 v 3.0 v 1.5 v 3 2 1 4 8 7 6 5 plh t i = 3.75 ma f out put o (v ) input (i ) f out put (v ) o f t r t o z = 50 ? p ulse generator tr = 5ns (v ) e input monitor gnd v cc o (v ) out put l r l c (v ) out put o input (v ) e ehl t elh bypass .1 f fig. 20 test circuit and waveforms for t plh , t phl, t r and t f . fig. 21 test circuit t ehl and t elh . t 1 2 3 4 1 2 3 4 8 7 6 5 gnd v cc 8 7 6 5 dual channel pulse gen. z o = 50 ? t f = t r = 5 ns pulse gen. t f = t r = 5 ns z o = 50 ? +5 v i f v cc r m r l .1 f bypass c l +5v 47 ? r l input monitoring node input monitor (i f ) output (v o ) output v o monitoring node 0.1 f bypass c l * gnd t est circuit for HCPL0600, hcpl0601 and hcpl0611 t est circuit for hcpl0637, hcpl0638 and hcpl0639
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 12 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers +5v peak 3 2 1 4 8 7 6 5 gnd v cc o (v ) output 350 ? v cm ff v a b pulse gen i f cm v 0v o v 5v switching pos. (a), i = 0 f o v (max) cm 0.5 v o v switching pos. (b), i = 7.5 ma f h cm l v (min) o bypass 0.1 f fig. 22 test circuit common mode transient immunity t est circuit for HCPL0600, hcpl0601, and hcpl0611 (HCPL0600, hcpl0601 and hcpl0611)
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 13 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers peak cm v 0v o v 3.3v switching pos. (a), i = 0 f o v (max) cm 0.5 v o v switching pos. (b), i = 7.5 ma f h cm l v (min) o fig. 23 t (hcpl0637, hcpl0638 and hcpl0639) est circuit common mode transient immunity 1 2 3 4 8 b a 7 6 5 dual channel +3.3v i f v cc v cm pulse generator z o = 50 ? +? r l v ff output v o monitoring node 0.1 f bypass gnd te st circuit for hcpl0637, hcpl0638 and hcpl0639
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 14 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers 8-pin small outline 0.024 (0.61) 0.050 (1.27) 0.155 (3.94) 0.275 (6.99) 0.060 (1.52)
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 15 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers ordering information * av ailable for HCPL0600, hcpl0601, hcpl0611 only. marking information option order entry identi?er description no suf? HCPL0600 shipped in tubes (50 units per tube) v* HCPL0600v iec60747-5-2 approval r2 HCPL0600r2 tape and reel (2500 units per reel) r2v* HCPL0600r2v iec60747-5-2 approval, tape and reel (2500 units per reel) 1 2 6 4 3 5 de?nitions 1f airchild logo 2d e vice number 3 vde mark indicates iec60747-5-2 approval (note: only appears on parts ordered with vde option ? see order entry table) 4 one digit year code, e.g., ? 5t wo digit work week ranging from ?1 to ?3 6 assembly package code 600 s yy x v
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 16 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers carrier tape speci?cations 4.0 0.10 1.5 min user direction of feed 2.0 0.05 1.75 0.10 5.5 0.05 12.0 0.3 8.0 0.10 0.30 max 8.3 0.10 3.50 0.20 0.1 max 6.40 0.20 5.20 0.20 1.5 0.1/-0
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 17 hcpl06xx ?high speed-10 mbit/s logic gate optocouplers re?ow pro?le pro?le freature pb-free assembly pro?le t emperature min. (tsmin) 150? t emperature max. (tsmax) 200? time (t s ) from (tsmin to tsmax) 60?20 seconds ramp-up rate (t l to t p ) 3?/second max. liquidous temperature (t l ) 217? time (t l ) maintained above (t l ) 60?50 seconds p eak body package temperature 260? +0? / ?? time (t p ) within 5? of 260? 30 seconds ramp-down rate (t p to t l ) 6?/second max. time 25? to peak temperature 8 minutes max. time (seconds) te mperature ( c) ti me 25? to peak 260 240 220 200 180 160 140 120 100 80 60 40 20 0 t l t s t l t p t p ts m a x ts m i n 120 preheat area max. ramp-up rate = 3?/s max. ramp-down rate = 6?/s 240 360
?006 fairchild semiconductor corporation www.fairchildsemi.com hcpl06xx rev. 1.0.8 18 tradem arks th e following includes registered and unregistered trademarks and service marks, owned by fairchild semiconductor and/or its global subsidiaries ,and is not in tended to be an exhaustive list of all such trademarks. auto-spm build it now coreplus corepower crossvolt ctl current transfer logic ecospark e fficentmax ezswitch* * fair child fairchild semiconductor fa ct quiet series fact f ast fa stvcore fetbench flashwriter * fps f-pfs frfet global power resource sm green fps green fps e-series g max gto in tellimax isoplanar me gabuck mi crocoupler microfet mi cropak m illerdrive moti onmax mo tion-spm optologic op toplanar pdp spm powe r-spm po we rtrench powerxs pr ogrammable active droop qfet qs quiet series r apidconfigure saving our world, 1mw/w/kw at a time sm artmax smart start spm stealth s uperfet supersot -3 s upersot -6 s upersot -8 s upremos syncfet sy nc-lock * th ep ower franchise ti nyboost tinybuck ti nylogic tinyopto tinypower tinypwm tinywire trifault detect t ruecurrent * serdes uhc ultra frfet unifet vcx vi sualmax xs *t rademarks of system general corporation, used under license by fairchild semiconductor. disclaimer fa i rchild semiconductor reserves the right to make changes without further notice to any products herein to improve reliability, function, or design. fairchild does not assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights, nor the rights of others. these specifications do not expand the terms of fairchild? worldwide terms and conditions, specifically the warranty therein, which covers t hese products. li fe support policy fa i rchild? products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are in tended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance wi th instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. a critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. an ti -counterfeiting policy fairchild semiconductor corporation's anti-counterfeiting policy. fairchild's anti-counterfeiting policy is also stated on our external websi te, www.fairchildsemi.com, under sales support. c ounterfeiting of semiconductor parts is a growing problem in the industry. all manufacturers of semiconductor products are experiencing counterf eiting of their parts. cu stomers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, faile da pplications, and increased cost of production and manufacturing delays. fairchild is taking strong measures to protect ourselves and our customers from the proli feration of counterfeit parts. fairchild strongly encourages customers to purchase fairchild parts either directly from fairchild or from authorized fairchi ld dist ributors who are lis ted by country on our web page cited above. products customers buy either from fairchild directly or from authorized fairchild distributors are ge nuine parts, have full traceability, meet fairchild's quality standards for handling and storage and provide access to fairchild's full range of up-to-date technica land product information. fairchild and our authorized distributors will stand behind all warranties and will appropriately address any warranty issues that may arise. fairc hild will not provide any warranty coverage or other assistance for parts bought from unauthorized sources. fairchild is committed to combat this global problem and encou rage our customers to do their part in stopping this practice by buying direct or from authorized distributors. product status definitions defi nition of terms da tasheet identification product st atus definition ad vance information formative / in design datasheet contains the design specifi cations for product development. s pecifications may change in any manner without notice. pr eliminary datasheet contains preliminary data; supplementary data will be published at a later date. fairchild se mi conductor reserves the right to make changes at any time without notice to improve design. no i dentification needed full production datasheet contains final specifications. fairchi ld semiconductor reserves the right to make changes at any time without notice to improve the design. obsolete not in production datasheet contains specifications on a product that is discontinued by fairchild semiconductor. th e datasheet is for reference information only. rev. i40 first production hcpl06xx ?high speed-10 mbit/s logic gate optocouplers

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